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Publication Date:
March 2008
ISSN:
2083-8492
DOI:
10.2478/v10006-008-0010-2

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Remarks on Hardware Implementation of Image Processing Algorithms

Marek Wnuk1

Institute of Computer Engineering, Automation and Robotics, Wrocław University of Technology, ul. Janiszewskiego 11/17, 50--372 Wrocław, Poland1

Citation Information: International Journal of Applied Mathematics and Computer Science. Volume 18, Issue 1, Pages 105–110, ISSN (Print) 1641-876X, DOI: 10.2478/v10006-008-0010-2, March 2008

Publication History:
Published Online:
2008-03-21

Remarks on Hardware Implementation of Image Processing Algorithms

Image processing in industrial vision systems requires both real-time speed and robustness. Modern computers, which fulfill the first demand, are sensitive to hard industrial environment conditions and require considerable amounts of energy. Programmable logic chips are available, which can realize many simple, still time-consuming operations in a parallel or a pipelined manner. The paper discusses particular features of the pipelined architecture and presents selected techniques of implementing early image processing procedures in hardware.

Keywords: On-line image processing; real-time; hardware; pipeline; programmable logic

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