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Licensed Unlicensed Requires Authentication Published by De Gruyter Oldenbourg September 16, 2016

Dark silicon management: an integrated and coordinated cross-layer approach

Santiago Pagani, Lars Bauer, Qingqing Chen, Elisabeth Glocker, Frank Hannig, Andreas Herkersdorf, Heba Khdr, Anuj Pathania, Ulf Schlichtmann, Doris Schmitt-Landsiedel, Mark Sagi, Éricles Sousa, Philipp Wagner, Volker Wenzel, Thomas Wild and Jörg Henkel

Abstract

This paper presents an integrated and coordinated cross-layer sensing and optimization flow for distributed dark silicon management for tiled heterogeneous manycores under a critical temperature constraint. We target some of the key challenges in dark silicon for manycores, such as: directly focusing on power density/temperature instead of considering simple per-chip power constraints, considering tiled heterogeneous architectures with different types of cores and accelerators, handling the large volumes of raw sensor information, and maintaining scalability. Our solution is separated into three abstraction layers: a sensing layer (involving hardware monitors and pre-processing), a dark silicon layer (that derives thermally-safe mappings and voltage/frequency settings), and an agent layer (used for selecting the parallelism of applications and thread-to-core mapping based on alternatives/constraints from the dark silicon layer).

Acknowledgement

This work is supported in parts by the German Research Foundation (DFG) as part of the SFB TR-89 Invasive Computing (http://invasic.de) [16].

Received: 2016-5-10
Revised: 2016-8-16
Accepted: 2016-8-22
Published Online: 2016-9-16
Published in Print: 2016-12-28

©2016 Walter de Gruyter Berlin/Boston