Performance analysis of carrier depletion silicon PIN phase shifter

In this paper, we report the performance of a carrier depletion Silicon PINphase shifterwith over layer of 130 nm. It is observed that an optimum intrinsic gap of 250 nm for a device length of 5 mm at 2 V, resulted in Extinction Ratio (ER) of 23.41 dB and Bit Error Rate (BER) of 1.00 × 10 is obtained for 50 Gbps. The phase shifter is also designed for length 2mmwith an intrinsic gap of 100 nm at an operating voltage <4 V. The study also reveals that the proposed design for Mach-Zehnder modulator operating at a data rate of 100 Gbps for the concentration of P = 7 × 10 cm and N = 5 × 10 cm gives better BER and phase performance. The proposed design was also analysed in an intra-data centre communication setup of fibre length 15 km.


Introduction
High data rate transmission with low loss is required to meet current network demands. Silicon optical modulator is capable of meeting the demand with low cost and miniaturized footprint, due to fabrication using advanced Complementary Metal-Oxide-Semiconductor (CMOS) technologies. Significance of phase shifter in silicon modulator is highlighted in Mach-Zehnder or Ring resonator Modulators. Different types of charge carrier movement techniques are being adopted in phase shifters such as carrier injection, depletion, accumulation etc., to produce the modulation of the optical beam.
Carrier depletion type modulators are widely studied because of their high-speed operation and simple fabrication process but are plagued by high insertion loss restricting its commercial applications [1,2]. Doping concentration and the geometry of the phase shifter determines the performance of the modulator. The modulation efficiency of Silicon modulators is defined by the phase shift (π) at low voltage. This can be achieved by increasing the carrier concentration. With the increase in carrier concentration, the capacitance increases along with the insertion loss [3,4]. In Ref. [5], the rise in electron-hole carrier concentration from 5 × 10 17 cm −3 to 2.5 × 10 18 cm −3 , improved the effective index change at the cost of insertion loss. Varying the dopant pattern i.e. interdigitated pattern [6][7][8] is also used to improve the capacitance and reduce the V π at the cost of insertion loss. Different approaches have been proposed by altering the PN junction geometry such as vertical PN junction, horizontal, lateral, interleaved, etc., and are analysed in Ref. [9] with different doping concentrations [10]. The vertical PIN junction with high dopants increased the absorption loss which affects the usage of the phase shifters for high data rate [9]. The optical loss is reduced by reducing the dopant exposure region in Ref. [10] but at the expense of V π L π . Interleaved junction [11] increased the capacitance per unit length as the additional PN junctions are formed along the length of the phase shifter. But with the increase in carriers, the absorption loss also increased. The junction area was increased in a vertical PN junction [12] which led to a reduction in V π L π but as the volume of the carrier concentration increased, the loss is increased with it. A U-shaped junction was introduced in Ref. [13] to make better effective index change at low voltage but due to the large presence of carriers, the loss increased. LiNbO 3 was used in modulators designed in Refs. [14,15] to improve the modulation speed. Modulation efficiency of the phase shifter is based on the overlap between the carrier concentration region and the optical path, whereas the modulation speed is restricted by the amount of charges depleted [8]. An intrinsic layer reduces the carriers in the optical path. Thus intrinsic region in a PIN junction plays a major role in determining the performance of the phase shifter. Phase shifters are being designed to obtain modulation at high speed, low loss, low V π L π and high ER, to have commercial application. The proposed design aims to reduce the loss and to obtain lower V π L π for higher bit rates with the selection of optimum intrinsic gap. MZM's temperature tolerance and wide λ operating range have made them a preferable choice for modulation over ring modulators, traditionally. However, the large power consumption has usually made them less viable for industrial applications. Minimum insertion loss with high extinction ratio and low power consumption are preferable in MZM.
In this paper, the performance of the PIN phase shifter with different doping concentrations and phase shifter lengths 5 and 2 mm is analysed. The length of the phase shifter plays a significant role in its performance. The efficiency of the phase shifter is being analysed by the product of V π L π . The goal is to achieve a better extinction ratio with minimum loss using carrier depletion based proposed PIN phase shifter in MZM. Simulations were performed by varying the intrinsic layer width and the results are discussed in Section III. The design structure is explained in the following section.

Design structure
The dimensions of the rib waveguide ( Figure 1) is chosen as 500 × 220 nm with the thickness of the rib waveguide (t Rib ) set to fabrication facilities standard. Modulators work in TE 1 mode that provides a high effective index for better optical confinement and hence 500 nm is chosen as the width of the waveguide. The P and N layers are doped with the concentration of 7 × 10 17 cm −3 and 5 × 10 17 cm −3 . The concentration of holes is kept higher as the holes have minimal absorption with large index shift when compared to electrons [15]. The reverse bias of 0.5-3 V is applied via P ++ and N ++ regions to keep the power consumption minimal. The doping concentrations of both P ++ & N ++ is 1 × 10 19 cm −3 to reduce access resistance. Aluminium electrodes are preferred for better electrical contacts. Figure 2 shows the cross-section of the PIN phase shifter. In PN structure, free carrier absorption loss is high whereas, in the PIN, the intrinsic region reduces the contact of the dopants with the light confined within the waveguide reducing the loss. At the optimum intrinsic gap for the device, the structure shows high modulation efficiency is obtained. The width of the intrinsic gap (W i ) is varied (100, 200, 250, 300, 350 and 450 nm) for the phase shifter (PS) lengths 2 and 5 mm, their corresponding results are obtained and tabulated for analysis.

Results & analysis
The modelling and design analysis were performed using Lumerical software (Mode, Device (CT) and Interconnect).
The electrical circuit diagram is shown in Figure 3. The intrinsic region between the P and N type regions increases the distance between them and reduces the capacitance. In reverse bias, the PIN structure behaves like a capacitor. The P and N region acts as the positive and negative plates of the capacitor, and the intrinsic region as the insulator between the plates.
The amount of charge carriers that move in and out of the waveguide for a specified drive voltage (V ) varies the capacitance per unit length. In order to calculate the   capacitance, the carrier distribution in the PIN structure has to be converted to a 1-dimensional free carrier distribution model as shown in Figure 4 and calculated using the equation (1).
Capacitance of the junction [16], Where, -ε s = relative permittivity, The capacitance for various W i at varying V are plotted in Figure 5. It is observed that the increase in W i reduces the capacitance value. This is primarily due to the reduction of carrier concentration in the waveguide. When the voltage was applied, the carriers were depleted from the centre of the waveguide thus reducing the capacitance with an increase in V.
The electro-optic effect occurs due to the variation in the carrier concentration. Due to the depletion of carriers present in the waveguide by the application of V, the effective index (n eff (V)) of the phase shifter increases which in turn increases the phase shift (φ) in the light and reduces light absorption by the carriers. The effective index and the phase shift are calculated using equations (2) & (4).
where, n eff,i = effective index of the waveguide without doping Change in the effective index ( Figure 6) causes the change in phase (Figure 7) of the light being transmitted in the arm of the modulator (L). From Figure 7 it is inferred that an increase in W i reduces the number of carriers needed for effective index change to produce the necessary phase shift, thus reducing the phase shift. From Figure 8 it is inferred that as the exposure of the dopants to the photons is minimized, the loss is reduced.
With further increase in voltage, the carriers are depleted from the waveguide reducing the optical carrier absorption loss. The phase shifter is used in an arm of the unbalanced MZM with an arm length difference of 100 µm. The transmission per wavelength for voltage (V ) is calculated using equation (5).
The transmission spectra lie within λ = 1553.4-1553.7 nm and the wavelength 1553.5 nm is selected for detailed study. In order to study the W i variations in the modelled PIN structure, the analysis was performed at 20 Gbps with NRZ technique for Pseudo-Random Bit sequence. A phase shift of 180°is required to obtain the modulation and extinction ratio is calculated from the obtained eye diagram. When the W i is small, the carrier absorption loss occurs leading to a reduction in BER and the increase in W i improves the BER but requires high voltage to produce the required phase shift. Higher extinction ratio with good BER (Table 1) was obtained for W i = 100 and 250 nm at 1 and 2 V respectively for 5 mm phase shifter.
When the PS length is reduced to 2 mm, the reduction in dopant exposure length decreases the optical loss leading to good BER at the expense of the ER ( Table 2). In order to get a high ER, the intrinsic region has to be near the high-intensity optical centre and also high voltage is required, as the exposure length is less. For W 2 & PS length = 2 mm, voltage >3 V is required for obtaining high ER with acceptable BER. From Table 2, it is observed that the effective index change to produce the destructive interference occurred at 3 V for 2 mm PS length to obtain 23.707 dB ER and 3.522 × 10 −14 BER at 20 Gbps.
With wider eye-opening and lower jitter, high-speed transmission for the modulator is possible. The eyecrossing lies above 23% (Figure 9) in the zero signal level which causes the timing for 'one' pulse to be lower than that of 'zero' pulse at higher bitrate with the alternating 0's and 1's. The timing for one pulse further reduces which degrades the BER. The eye being wider with sharp rise and fall times, reduces the Duty Cycle Distortion (DCD) which measures the time distortions for the signals one and zero. DCD is given by equation (6).

DCD
100 × t r & t f difference at the eye centre Bit period (6) The deviation from the ideal 0% of DCD leads to error in reception causing an increase in BER. DCD is calculated to be ∼3% for Figure 9, which makes the modulator feasible for higher transmission rates. Carrier concentration varia-     increased, the carriers that are not near the junction remain un-depleted which results in the decrease of modulator efficiency due to the increase in loss. The decrease of the carrier concentration reduces the absorption loss but also minimizes the eye-opening leading to a reduction in ER and an increase in required voltage. For W 2 and PS length = 5 mm (L) in P & N = 10 18 cm −3 , the DCD value increased causing the BER to increase. Thus from the tabulated results (Table 3), it is clear that for the designed structure, 10 17 cm −3 carrier concentration provides better ER and BER for optical communication.
The timing for one pulse being lower than that of zero pulse causes an increase in BER at high speeds. When the Bit rate is increased to 50 Gbps, it is observed ( Table 4) that PS length = 5 mm with W 2 , (V π L π = 1 Vcm) produces acceptable BER with good ER. For W 1 , an increase in exposure of dopants to light raises the optical loss and with DCD further deviating from zero causes a decrease in BER, making the device unsuitable for high-speed applications.
Various doping patterns were experimented in order to obtain high modulation efficiency. Few of the recently published articles are compared in Table 5.
Proposed work I: When W i = 100 nm & PS length = 5 mm, 0.5 V π L π is achieved. The loss affects the BER which is due to the high dopant exposure. To reduce the loss, the length of the phase shifter was reduced to 2 mm (W i = 100 nm) resulted in increase of V π L π to 0.6 Vcm and loss 2.42753 dB/cm. Proposed work II: At W i = 250 nm & PS length = 5 mm, the loss is minimised (1.94663 dB/cm) due to the reduction in dopant exposure to the light at the expense of 1 Vcm V π L π .
The above results demonstrate that the proposed design outperforms the other devices.
The proposed modulator with 2 mm phase shifter was analysed for intra data centre communication till 15 km in Lumerical Interconnect. The simulation setup is explained in Figure 10. The analysis was performed for a bit rate of 100 Gbps and laser beam of 1553.5 nm wavelength. The pre optical amplifier setup was used with the amplifier gain of 20 dB. The optical fibre has a dispersion of 16 ps/nm/km J.S. Ramesh Gabriel and S. Arunagiri: Carrier depletion silicon PIN phase shifter and attenuation of 0.2 dB/km. BER and ER was measured as the length of the optical fibre was varied (Table 6). It is observed that the BER obtained is well below the FEC threshold level of 3.8 × 10 −3 .
As the length increased due to dispersion and attenuation present in the fibre the ER decreased and BER increased. From the analysis it is found that the proposed modulator is suited for inter and intra chip communication.

Conclusion
In this paper high-performance Carrier depletion Silicon PIN phase shifter is designed and numerical analysis was performed for the range of 100-450 nm intrinsic gaps for PS length of 2 and 5 mm. The optimum intrinsic gap with dopant concentration for rib waveguide structure is designed and analysed considering the trade-off condition between the ER, BER and loss for obtaining high modulation efficiency at minimum voltage. The designed phase shifter in MZM has 24.088 & 23.707 dB ER at 20 Gbps for 5 & 2 mm lengths at 1 V and 3 V respectively. For 100 Gbps and PS lengths 5 and 2 mm, 22.32 & 21.59 dB ER is obtained at 1 V & 3 V respectively. An optimum intrinsic gap i.e. 250 in 5 mm PIN phase shifter was found to produce 21.19 dB ER with BER 8.98 × 10 −8 and dB 20.65 ER with BER 2.70 × 10 −05 at 2 V, for 50 and 100 Gbps respectively having V π L π as 1 Vcm. The proposed design was also analysed in an intra-data centre communication setup of fibre length 15 km. This paper reports an optimum value of intrinsic gap and dopant concentration to obtain high modulation efficiency and speed, for PIN phase shifter at low voltage.