The CRC project focuses on the utilization of fast reconfiguration to optimize area, performance, and power. The results are quantified by a synthesizable architecture model and by a commercial architecture. In order to assure good applicability of the research, a C-compiler is co-developed with the architecture. This article provides an overview of the optimization techniques and a summary of current evaluation results.

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- Reconfigurable Computing Systems (Rekonfigurierbare Rechensysteme)
- The Erlangen Slot Machine – A Platform for Interdisciplinary Research in Dynamically Reconfigurable Computing (ESM - Eine Hardware-Plattform für interdisziplinäre Forschung im Bereich des dynamischen rekonfigurierbaren Rechnens)
- Exploration, Partitioning and Simulation of Reconfigurable Systems (Exploration, Partitionierung und Simulation rekonfigurierbarer Systeme)
- CRC – Concepts and Evaluation of Processor-Like Reconfigurable Architectures (CRC – Konzepte und Bewertung prozessorartig rekonfigurierbarer Architekturen)
- New Adaptive Multi-grained Hardware Architecture for Processing of Dynamic Function Patterns (Neue adaptive multi-granulare Hardwarearchitektur)
- Dynamically Reconfigurable Computing for Wireless Communication Systems (Dynamisch rekonfigurierbares Rechnen für Mobilfunksysteme)
- Autovision – A Run-time Reconfigurable MPSoC Architecture for Future Driver Assistance Systems (Autovision – Eine zur Laufzeit rekonfigurierbare MPSoC Architektur für zukünftige Fahrerassistenzsysteme)
- An Area Efficient Realisation of AES for Wireless Devices (Eine flächeneffiziente AES Hardwarerealisierung für drahtlose Geräte)
- Collaborative Research Center 516: Design and Manufacturing of Active Micro Systems (Sonderforschungsbereich 516: Konstruktion und Fertigung aktiver Mikrosysteme)
- Wissensteilung und -handel auf elektronischen Marktplätzen (Knowledge Sharing and Trading on Electronic Marketplaces)
- Was bleibt vom Informatikjahr?
CRC – Concepts and Evaluation of Processor-Like Reconfigurable Architectures (CRC – Konzepte und Bewertung prozessorartig rekonfigurierbarer Architekturen)
30,00 € / $42.00 / £23.00
Get Access to Full TextDas CRC-Projekt beschäftigt sich mit der Nutzbarmachung schneller Rekonfiguration, um Flächenbedarf, Ausführungsgeschwindigkeit und Verlustleistung zu optimieren. Die Ergebnisse werden anhand eines synthetisierbaren Architekturmodells und einer kommerziellen Architektur beurteilt. Um die entwickelten Konzepte auch praktisch einsetzen zu können, wird ein C-Compiler gemeinsam mit der Architektur entwickelt. Dieser Beitrag liefert einen Überblick über die Optimierungstechniken und eine Zusammenfassung aktueller Bewertungsergebnisse.
Keywords: dynamic hardware reconfiguration; coarse grained reconfigurable architectures; high-level compiler; voltage reconfiguration
About the article
Published Online: 2009-09-25
Published in Print: 2007-05-01
Citation Information: it - Information Technology, Volume 49, Issue 3, Pages 157–164, ISSN (Online) 2196-7032, ISSN (Print) 1611-2776, DOI: https://doi.org/10.1524/itit.2007.49.3.157.
© Oldenbourg Wissenschaftsverlag.
Related Content
- Reconfigurable Computing Systems (Rekonfigurierbare Rechensysteme)
- The Erlangen Slot Machine – A Platform for Interdisciplinary Research in Dynamically Reconfigurable Computing (ESM - Eine Hardware-Plattform für interdisziplinäre Forschung im Bereich des dynamischen rekonfigurierbaren Rechnens)
- Exploration, Partitioning and Simulation of Reconfigurable Systems (Exploration, Partitionierung und Simulation rekonfigurierbarer Systeme)
- CRC – Concepts and Evaluation of Processor-Like Reconfigurable Architectures (CRC – Konzepte und Bewertung prozessorartig rekonfigurierbarer Architekturen)
- New Adaptive Multi-grained Hardware Architecture for Processing of Dynamic Function Patterns (Neue adaptive multi-granulare Hardwarearchitektur)
- Dynamically Reconfigurable Computing for Wireless Communication Systems (Dynamisch rekonfigurierbares Rechnen für Mobilfunksysteme)
- Autovision – A Run-time Reconfigurable MPSoC Architecture for Future Driver Assistance Systems (Autovision – Eine zur Laufzeit rekonfigurierbare MPSoC Architektur für zukünftige Fahrerassistenzsysteme)
- An Area Efficient Realisation of AES for Wireless Devices (Eine flächeneffiziente AES Hardwarerealisierung für drahtlose Geräte)
- Collaborative Research Center 516: Design and Manufacturing of Active Micro Systems (Sonderforschungsbereich 516: Konstruktion und Fertigung aktiver Mikrosysteme)
- Wissensteilung und -handel auf elektronischen Marktplätzen (Knowledge Sharing and Trading on Electronic Marketplaces)
- Was bleibt vom Informatikjahr?

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