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it - Information Technology

Methods and Applications of Informatics and Information Technology

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Volume 58, Issue 6 (Dec 2016)

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Invasive computing for timing-predictable stream processing on MPSoCs

Stefan Wildermann
  • Corresponding author
  • Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Hardware/Software Co-Design, Cauerstr. 11, 91058 Erlangen, Germany Germany
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  • De Gruyter OnlineGoogle Scholar
/ Michael Bader
  • Technical University of Munich (TUM), Hardware-aware algorithms and software for HPC, Boltzmannstr. 3, 85748 Garching, Germany Germany
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  • De Gruyter OnlineGoogle Scholar
/ Lars Bauer
  • Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Haid-und-Neu-Str. 7, 76131 Karlsruhe, Germany Germany
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  • De Gruyter OnlineGoogle Scholar
/ Marvin Damschen
  • Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Haid-und-Neu-Str. 7, 76131 Karlsruhe, Germany Germany
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  • De Gruyter OnlineGoogle Scholar
/ Dirk Gabriel
  • Technical University of Munich (TUM), Intstitute for Integrated Systems, Arcisstr. 21, 80290 Munich, Germany Germany
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/ Michael Gerndt
  • Technical University of Munich (TUM), Chair for Computer Architecture, Boltzmannstr. 3, 85748 Garching, Germany Germany
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/ Michael Glaß
  • Ulm University, Institute of Embedded Systems/Real-Time Systems, Albert-Einstein-Allee 11, 89081 Ulm, Germany Germany
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/ Jörg Henkel
  • Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Haid-und-Neu-Str. 7, 76131 Karlsruhe, Germany Germany
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/ Johny Paul
  • Technical University of Munich (TUM), Intstitute for Integrated Systems, Arcisstr. 21, 80290 Munich, Germany Germany
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/ Alexander Pöppl
  • Technical University of Munich (TUM), Hardware-aware algorithms and software for HPC, Boltzmannstr. 3, 85748 Garching, Germany Germany
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/ Sascha Roloff
  • Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Hardware/Software Co-Design, Cauerstr. 11, 91058 Erlangen, Germany Germany
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/ Tobias Schwarzer
  • Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Hardware/Software Co-Design, Cauerstr. 11, 91058 Erlangen, Germany Germany
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/ Gregor Snelting
  • Karlsruhe Institute of Technology (KIT), Institute for Program Structures and Data Organisation (IPD), Am Fasanengarten 5, 76131 Karlsruhe, Germany Germany
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/ Walter Stechele
  • Technical University of Munich (TUM), Intstitute for Integrated Systems, Arcisstr. 21, 80290 Munich, Germany Germany
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/ Jürgen Teich
  • Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Hardware/Software Co-Design, Cauerstr. 11, 91058 Erlangen, Germany Germany
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/ Andreas Weichslgartner
  • Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Hardware/Software Co-Design, Cauerstr. 11, 91058 Erlangen, Germany Germany
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/ Andreas Zwinkau
  • Karlsruhe Institute of Technology (KIT), Institute for Program Structures and Data Organisation (IPD), Am Fasanengarten 5, 76131 Karlsruhe, Germany Germany
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Published Online: 2016-09-30 | DOI: https://doi.org/10.1515/itit-2016-0021

Abstract

Multi-Processor Systems-on-a-Chip (MPSoCs) provide sufficient computing power for many applications in scientific as well as embedded applications. Unfortunately, when real-time requirements need to be guaranteed, applications suffer from the interference with other applications, uncertainty of dynamic workload and state of the hardware. Composable application/architecture design and timing analysis is therefore a must for guaranteeing real-time applications to satisfy their timing requirements independent from dynamic workload. Here, Invasive Computing is used as the key enabler for compositional timing analysis on MPSoCs, as it provides the required isolation of resources allocated to each application. On the basis of this paradigm, this work proposes a hybrid application mapping methodology that combines design-time analysis of application mappings with run-time management. Design space exploration delivers several resource reservation configurations with verified real-time guarantees for individual applications. These timing properties can then be guaranteed at run-time, as long as dynamic resource allocations comply with the offline analyzed resource configurations.

This article describes our methodology and presents programming, optimization, analysis, and hardware techniques for enforcing timing predictability. A case study illustrates the timing-predictable management of real-time computer vision applications in dynamic robot system scenarios.

Keywords: Hybrid application mapping; composability; predictability; networks-on-chip; design space exploration; robot vision

ACM CCS: Computer systems organization →Embedded and cyber-physical systems; Computer systems organization →Real-time systems

Acknowledgement

This work was supported by the German Research Foundation (DFG) as part of the Transregional Collaborative Research Centre “Invasive Computing” (SFB/TR 89).

About the article

Stefan Wildermann

Stefan Wildermann received his Diploma and Doctorate degrees in Computer Science from Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany in 2006 and 2012. Since 2012, Stefan is research assistant, lecturer, and group leader at the chair of Hardware/Software Co-Design, FAU.

Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Hardware/Software Co-Design, Cauerstr. 11, 91058 Erlangen, Germany

Michael Bader

Michael Bader is associate professor at the Technical University of Munich. Since 2011, he leads the group on hardware-aware algorithms and software for HPC. His research interests particularly focus on parallel simulation software for large-scale applications.

Technical University of Munich (TUM), Hardware-aware algorithms and software for HPC, Boltzmannstr. 3, 85748 Garching, Germany

Lars Bauer

Lars Bauer received his M.Sc. (Dipl.-Inform) and Ph.D. (Dr.-Ing.) in Computer Science from the University of Karlsruhe, Germany, in 2004 and 2009, respectively. He is currently a research assistant, lecturer and group leader at the Chair for Embedded Systems (CES) at the Karlsruhe Institute of Technology (KIT).

Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Haid-und-Neu-Str. 7, 76131 Karlsruhe, Germany

Marvin Damschen

Marvin Damschen received his B.Sc. and M.Sc. degrees in Computer Science with a minor in Mathematics from the University of Paderborn, Germany, in 2012 and 2014, respectively. Currently, he is pursuing his Ph.D. at the Chair for Embedded Systems (CES) at the Karlsruhe Institute of Technology (KIT), Germany, under the supervision of Prof. Dr. Jörg Henkel.

Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Haid-und-Neu-Str. 7, 76131 Karlsruhe, Germany

Dirk Gabriel

Dirk Gabriel received his Master's degree from Technical University of Munich (TUM) in 2015. Since 2015, Dirk is researcher at the Institute for Integrated Systems, TUM.

Technical University of Munich (TUM), Intstitute for Integrated Systems, Arcisstr. 21, 80290 Munich, Germany

Michael Gerndt

Michael Gerndt received his Doctorate degree in Computer Science from the University of Bonn in 1989. After his Habilitation he became professor for parallel and distributed computer architecture at the Technical University of Munich in 2000.

Technical University of Munich (TUM), Chair for Computer Architecture, Boltzmannstr. 3, 85748 Garching, Germany

Michael Glaß

Michael Glaß received his Diploma and Doctorate degrees in Computer Science from Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany in 2006 and 2011. Between 2012 and 2016, he was an assistant professor for Dependable Embedded Systems at Hardware/Software Co-Design, FAU. Michael is currently an Associate Professor at the Institute of Embedded Systems/Real-Time Systems, Ulm University, Germany.

Ulm University, Institute of Embedded Systems/Real-Time Systems, Albert-Einstein-Allee 11, 89081 Ulm, Germany

Jörg Henkel

Jörg Henkel is currently with Karlsruhe Institute of Technology (KIT), Germany, where he is directing the Chair for Embedded Systems (CES). Before, he was a Senior Research Staff Member at NEC Laboratories in Princeton, NJ. He received his Ph.D. from Braunschweig University with “Summa cum Laude”.

Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Haid-und-Neu-Str. 7, 76131 Karlsruhe, Germany

Johny Paul

Johny Paul received his B.Sc. degree from Mahatma Gandhi University, Kerala, India, in 2005, worked as a project engineer at Wipro Technologies, Bangalore, India from 2005 to 2008, received his M.Sc. degree from Technical University of Munich (TUM) in 2010, worked towards his PhD at TUM since then.

Technical University of Munich (TUM), Intstitute for Integrated Systems, Arcisstr. 21, 80290 Munich, Germany

Alexander Pöppl

Alexander Pöppl received his Master's degree at the Technical University of Munich in 2014. Thereafter, he joined the Chair of Scientific Computing at TUM in December 2014 as a doctoral researcher.

Technical University of Munich (TUM), Hardware-aware algorithms and software for HPC, Boltzmannstr. 3, 85748 Garching, Germany

Sascha Roloff

Sascha Roloff received his Diploma degree in Systems of Information and Multimedia Technology from Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany in 2011. Since 2011, Sascha is a doctoral researcher and lecturer at the chair of Hardware/Software Co-Design, FAU.

Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Hardware/Software Co-Design, Cauerstr. 11, 91058 Erlangen, Germany

Tobias Schwarzer

Tobias Schwarzer received his Diploma degree in Information and Communication Technology from Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany in 2012. Since 2012, Tobias is researcher at the chair of Hardware/Software Co-Design, FAU.

Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Hardware/Software Co-Design, Cauerstr. 11, 91058 Erlangen, Germany

Gregor Snelting

Gregor Snelting is holding the leading chair for Programming Paradigms at the KIT. His research interests are programming languages, compilers, object orientation, program analysis, semantics, software security, verification.

Karlsruhe Institute of Technology (KIT), Institute for Program Structures and Data Organisation (IPD), Am Fasanengarten 5, 76131 Karlsruhe, Germany

Walter Stechele

Walter Stechele received his Diploma and Doctorate degrees in electrical engineering from Technical University of Munich (TUM) in 1983 and 1988, respectively. From 1990 to 1993 Walter was with KONTRON, since 1993 back to TUM, now a professor for digital integrated circuit design.

Technical University of Munich (TUM), Intstitute for Integrated Systems, Arcisstr. 21, 80290 Munich, Germany

Jürgen Teich

Jürgen Teich received the M.S. degree from the University of Kaiserslautern, Germany in 1989 and the Ph.D. degree from the University of Saarland, Saarbruecken, Germany, in 1993. Jürgen Teich is with Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany, where he is directing the Chair for Hardware/Software Co-Design since 2003.

Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Hardware/Software Co-Design, Cauerstr. 11, 91058 Erlangen, Germany

Andreas Weichslgartner

Andreas Weichslgartner received his Diploma degree in Information and Communication Technology from Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Germany in 2010. Since 2010, Andreas is doctoral researcher at the chair of Hardware/Software Co-Design, FAU.

Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Hardware/Software Co-Design, Cauerstr. 11, 91058 Erlangen, Germany

Andreas Zwinkau

Andreas Zwinkau is a doctoral researcher at the chair for Programming Paradigms at the KIT. His research interests are programming languages, compilers, parallel and distributed programming, and memory models.

Karlsruhe Institute of Technology (KIT), Institute for Program Structures and Data Organisation (IPD), Am Fasanengarten 5, 76131 Karlsruhe, Germany


Revised: 2016-08-26

Accepted: 2016-09-06

Received: 2016-05-02

Published Online: 2016-09-30

Published in Print: 2016-12-28


Citation Information: it - Information Technology, ISSN (Online) 2196-7032, ISSN (Print) 1611-2776, DOI: https://doi.org/10.1515/itit-2016-0021.

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