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Opto-Electronics Review

Editor-in-Chief: Jaroszewicz, Leszek

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1896-3757
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Volume 20, Issue 2

Issues

Parallel performance of the fine-grain pipeline FPGA image processing system

M. Gorgoń
Published Online: 2012-10-17 | DOI: https://doi.org/10.2478/s11772-012-0021-2

Abstract

The use of FPGA circuits in imaging systems increases. They compete with other computing environments. The article describes the indications to be followed while choosing the type of image processing computing system taking under consideration the advantages and disadvantages of each technology: general purpose processor, digital signal processor, graphical processing unit, application specific Integrated circuit and field programmable gate array. Attention is drawn to various video transmission standards. The state of research and development trends in the field of FPGA-based image processing are briefly presented. A defining processing performance method for image processing is proposed. It is proven that for a pipeline architecture implemented in FPGA, a linear speedup is achieved and parallel efficiency is equal to one.

Keywords: image processing; FPGA; vision system; parallel processing; reconfigurable computing

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About the article

Published Online: 2012-10-17

Published in Print: 2012-06-01


Citation Information: Opto-Electronics Review, Volume 20, Issue 2, Pages 153–158, ISSN (Online) 1896-3757, DOI: https://doi.org/10.2478/s11772-012-0021-2.

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© 2012 SEP, Warsaw. This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 3.0 License. BY-NC-ND 3.0

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