Adaptive multi-layer techniques for increased system dependability

Lars Bauer 1 , Jörg Henkel 1 , Andreas Herkersdorf 2 , Michael A. Kochte 3 , Johannes M. Kühn 4 , Wolfgang Rosenstiel 4 , Thomas Schweizer 4 , Stefan Wallentowitz 2 , Volker Wenzel 1 , Thomas Wild 2 , Hans-Joachim Wunderlich 3 ,  and Hongyan Zhang 1
  • 1 Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems (CES)
  • 2 Technische Universität München, Institute for Integrated Systems
  • 3 Universität Stuttgart, Institut für Technische Informatik (ITI)
  • 4 University of Tübingen, Department of Computer Engineering


Achieving system-level dependability is a demanding task. The manifold requirements and dependability threats can no longer be statically addressed at individual abstraction layers. Instead, all components of future multi-processor systems-on-chip (MPSoCs) have to contribute to this common goal in an adaptive manner.

In this paper we target a generic heterogeneous MPSoC that combines general purpose processors along with dedicated application-specific hard-wired accelerators, fine-grained reconfigurable processors, and coarse-grained reconfigurable architectures. We present different reactive and proactive measures at the layers of the runtime system (online resource management), system architecture (global communication), micro architecture (individual tiles), and gate netlist (tile-internal circuits) to address dependability threats.

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it - Information Technology is a strictly peer-reviewed scientific journal. It is the oldest German journal in the field of information technology. Today, the major aim of it - Information Technology is highlighting issues on ongoing newsworthy areas in information technology and informatics and their application. It aims at presenting the topics with a holistic view.